Guide to processor history

This guide is really for my own use, it has been compiled from many sources, and I wouldnt have a clue as to who wrote what. Im not claiming any of it as my own research.

CPU history basically starts in 1971, when a small unknown company, Intel, for the first time combined multiple transistors to form a central processing unit - a chip called Intel 4004. However, it was 8 years before the first PC was constructed.

In November 1971, Intel publicly introduced the world's first single chip microprocessor, the Intel 4004 (U.S. Patent #3,821,715), invented by Intel engineers Federico Faggin, Marcian E. (Ted) Hoff and Stan Mazor. After the invention of integrated circuits revolutionized computer design, the only place to go was down -- in size that is. The Intel 4004 chip took the integrated circuit down one step further by placing all the parts that made a computer think (i.e. central processing unit, memory, input and output controls) on one small chip. Programming intelligence into inanimate objects had now become possible.

In 1968, Bob Noyce and Gordon Moore were two unhappy engineers working for the Fairchild Semiconductor Company who decided to quit and create their own company at a time when many Fairchild employees were leaving to create start-ups. People like Noyce and Moore were nicknamed the "Fairchildren".

Bob Noyce typed himself a one page idea of what he wanted to do with his new company, and that was enough to convince San Francisco venture capitalist Art Rock to back Noyce's and Moore's new venture. Rock raised $2.5 million dollars in less than 2 days.

The name "Moore Noyce" was already trademarked by a hotel chain, so the two founders decided upon the name "Intel" for their new company, a shortened version of "Integrated Electronics".

Intel's first money making product was the 3101 Schottky bipolar 64-bit static random access memory (SRAM) chip. In late 1969, a potential client from Japan called Busicom, asked to have twelve custom chips designed. Separate chips for keyboard scanning, display control, printer control and other functions for a Busicom-manufactured calculator.

Intel did not have the manpower for the job but they did have the brainpower to come up with a solution. Intel engineer, Ted Hoff decided that Intel could build one chip to do the work of twelve. Intel and Busicom agreed and funded the new programmable, general-purpose logic chip.

Federico Faggin headed the design team along with Ted Hoff and Stan Mazor, who wrote the software for the new chip. Nine months later, a revolution was born. At 1/8th inch wide by 1/6th inch long and consisting of 2,300 MOS (metal oxide semiconductor) transistors, the baby chip had as much power as the ENIAC, which had filled 3,000 cubic feet with 18,000 vacuum tubes.

Cleverly, Intel decided to buy back the design and marketing rights to the 4004 from Busicom for $60,000. The next year Busicom went bankrupt, they never produced a product using the 4004. Intel followed a clever marketing plan to encourage the development of applications for the 4004 chip, leading to its widespread use within months.

The 4004 was the world's first universal microprocessor. In the late 1960s, many scientists had discussed the possibility of a computer on a chip, but nearly everyone felt that integrated circuit technology was not yet ready to support such a chip. Intel's Ted Hoff felt differently; he was the first person to recognize that the new silicon-gated MOS technology might make a single-chip CPU (central processing unit) possible.

Hoff and the Intel team developed such an architecture with just over 2,300 transistors in an area of only 3 by 4 millimetres. With its 4-bit CPU, command register, decoder, decoding control, control monitoring of machine commands and interim register, the 4004 was one heck of a little invention. Today's 64-bit microprocessors are still based on similar designs, and the microprocessor is still the most complex mass-produced product ever with more than 5.5 million transistors performing hundreds of millions of calculations each second - numbers that are sure to be outdated fast.

The Pioneer 10 spacecraft used the 4004 microprocessor. It was launched on March 2, 1972 and was the first spacecraft and microprocessor to enter the Asteroid Belt.

Timeline information for CPU's

1971: 4004 Intel
The 4004 was Intel's first microprocessor. Introduced in 1970 with the speed of 108KHz This breakthrough invention powered the Busicom calculator and paved the way for embedding intelligence in inanimate objects as well as the personal computer. The 4-bit 4004 ran at 108 kHz and contained 2300 transistors. Its speed is estimated at 0.06 MIPS. By comparison, Intel's latest microprocessor, the P6 , runs at 133 MHz, contains 5.5 million transistors, and executes 300 MIPS.

1972: 8008 Intel
The 8008 was twice as powerful as the 4004. A 1974 article in Radio Electronics referred to a device called the Mark-8 which used the 8008. The Mark-8 is known as one of the first computers for the home. One that by today's standards was difficult to build, maintain and operate.

1974: 8080 Intel

Aprilrelease of the 8080 containing 6000 transistors, became the brains of the worlds first personal computer - the Altair running at the speed of 2Mhz, allegedly named for a destination of the Starship Enterprise from the Star Trek television show. Computer hobbyists could purchase a kit for the Altair for $395. Within months, it sold tens of thousands, creating the first PC back orders in history. If you drive, your life probably depends on this chip, the 8080 was first widely used as a traffic-light controller.

1978: 8086 Intel

June, Code named P1, this chip was skipped over for the first original PC, but was used in a few later computers that didn't amount to much. The 8086 had a 16-bit architecture that allowed it to work with 16-bit binary numbers and pass them through a 16-bit data bus, so it could communicate with its peripheral cards via a 16 wire data connection. The 8086 was available in clock speeds of 5MHz, 8MHz, and 10MHz. It started the world's most popular microprocessor standard: the x86 architecture.

1978: 8087 Intel

Floating-point math compressor compliant with the 8086 / 8080 microprocessor family.

1979: 8088 Intel

The 8088 was the first Processor used in the original IBM PC and XT personal computers It was less expensive than the 8086 microprocessor because of the availability of less expensive eight-bit data bus supporting chips. For that reason, IBM chose the 8088 over the 8086 for the original IBM PC, even though the 8088 was slower.
A pivotal sale to IBM's new personal computer division made the 8088 the brains of IBM's new hit product, the IBM PC. The 8088's success propelled Intel into the ranks of the Fortune 500, and Fortune magazine named the company one of the "Business Triumphs of the Seventies". The 8088 was available in speeds from 4.77 MHz and 8MHz.and used the 16-bit architecture allowing it to work internally with 16-digit numbers. The 8088 had the ability of addressing up to 1MB of RAM, and like the 8086, it is able to work with the 8087 math coprocessor chip.

Microprocessor released the 6800, and was later chosen by Apple for the Macintosh computer

The 80186 was a popular chip. Many versions have been developed in its history. Buyers could choose from CHMOS or HMOS, 8-bit or 16-bit versions, depending on what they needed. A CHMOS chip could run at twice the clock speed and at one fourth the power of the HMOS chip. They all shared a common core design. They had a 1-micron core design and ran at about 25MHz at 3 volts. The 80186 contained a high level of integration, with the system controller, interrupt controller, DMA controller and timing circuitry right on the CPU. Despite this, the 186 never found itself in a personal computer.

1981: V20 and V30 NEC

Clones of the 8088 and 8086. They are supposed to be about 30% faster than the Intel ones.

1982: 80286 Intel

Code named P2, A 16-bit, 134,000 transistor processor capable of addressing up to 16 MB of RAM. In addition to the increased physical memory support, this chip is able to work with virtual memory, thereby allowing much for expandability. The 286 was the first "real" processor. It introduced the concept of protected mode. This is the ability to multitask, having different programs run separately but at the same time. This ability was not taken advantage of by DOS, but future Operating systems, such as Windows, could play with this new feature. On the the drawbacks of this ability, though, was that while it could switch from real mode to protected mode (real mode was intended to make it backwards compatible with the 8088's), it could not switch back to real mode without a warm reboot. It was the first Intel processor that could run all the software written for its predecessor. This software compatibility remains a hallmark of Intel's family of microprocessors. This chip was used by IBM in its Advanced Technology PC/AT and was used in a lot of IBM-compatibles. It ran at 8, 10, and 12.5 MHz, but later editions of the chip ran as high as 20 MHz. The 286 was around 20 times faster then the predecessor 8088. While these chips are considered paperweights today, they were rather revolutionary for the time period.

1982: 80287 Intel

A compliant processor to the 286. A floating-point math coprocessor. Specially designed 286 chips have the capability of placing the optional 80287 processor on top of it. Giving the computer a math coprocessor.

1984: 68000 Motorola

More than any other, this is the microprocessor that helped establish the GUI. It was used in Apple's Lisa, a unique computer but a commercial flop that nevertheless paved the way for the Macintosh.

The 386 signified a major increase in technology from Intel. The 386 was a 32-bit processor, meaning its data throughput was immediately twice that of the 286.
386 chips were designed to be user friendly. All chips in the family were pin-for-pin compatible and they were binary compatible with the previous 186 chips, meaning that users didn't have to get new software to use it. Also, the 386 offered power friendly features such as low voltage requirements and System Management Mode (SMM) which could power down various components to save power. Overall, this chip was a big step for chip development. It set the standard that many later chips would follow. It offered a simple design which developers could easily design for.
The reduced version of this chip is the 386SX, discussed later. It talked with the cards via a 16-bit path.

1985: 80386DX Intel

Code named P3, the 80386DX included the math coprocessor unlike the 80386SX and still featured the 32-bit architecture and built-in multitasking.Containing 275,000 transistors, the 80386DX processor came in 16, 20, 25, and 33 MHz versions. The 32-bit address bus allowed the chip to work with a full 4 GB of RAM and a staggering 64 TB of virtual memory. In addition, the 386 was the first chip to use instruction pipelining, which allows the processor to start working on the next instruction before the previous one is complete. While the chip could run in both real and protected mode (like the 286), it could also run in virtual real mode, allowing several real mode sessions to be run at a time. A multi-tasking operating system such as Windows was necessary to do this, though.

1986: R2000 MIPS

The R2000, was a 32-bit CPU with 110,000 transistors. It powered the first generation of RISC workstations and servers. The original version, clocked at 8 MHz, executed about 5 MIPS and had a separate FPU.

1987 July: Sparc - Sun Microsystems

In July Sun released their Scaleable Processor ARChiture processor. It used RISC (Reduced Instruction Set) to speed up processing. Sun announced an open RISC architecture. The idea was to encourage multiple sourcing and lively competition that would spur performance and spread the SPARC standard far and wide. Eight years later, SPARC workstations and servers dominate their markets, with Super Sparc, and Ultra Sparc processors.

1988: PowerPC 601 IBM / Motorola

Although few doubted the power of the PowerPC architecture, many thought the politics of the IBM/Motorola/Apple relationship was going to be unmanageable. In less than two years, it has spawned the world's most popular RISC platform: the Power Macintosh.

1988: 80386SX Intel

It used an external 16-bit data bus rather than the 32-bit, and it was slower, but it thus used less power and thus enabled Intel to promote the chip into desktops and even portables. It lacked the functionality of the math coprocessor of the 80386DX, it had the math coprocessor in the chip, but it was disabled, probably because it failed testing procedures. however still featured the 32-bit internal architecture and built-in multitasking. The chip was available in clock speeds of 16MHz, 20MHz, 25MHz, and 33MHz.

1990: 80386SL Intel

The 80386SL is a 855,00 transistor version of the 386SX processor, with ISA compatibility and power management circuitry, and was used mainly in portable computers.

1989: 80486DX Intel

April 10th, code named P4, and containing 1.2 million transistors. It had the same memory capacity as the 386 (both were 32-bit) but offered twice the speed at 26.9 million instructions per second (MIPS) at 33 MHz. There are some improvements here, though, beyond just speed. The 486 was the first to have an integrated floating point unit (FPU) to replace the normally separate math coprocessor (not all flavors of the 486 had this, though). It also contained an integrated 8 KB on-die cache. This increases speed by using the instruction pipelining to predict the next instructions and then storing them in the cache. Then, when the processor needs that data, it pulls it out of the cache rather than using the necessary overhead to access the external memory. Also, the 486 came in 5 volt and 3 volt versions, allowing flexibility for desktops and laptops.

The first processor from Intel that was designed to be upgradeable. Previous processors were not designed this way, so when the processor became obsolete, the entire motherboard needed to be replaced. With the 486, the same CPU socket could accommodate several different flavors of the 486. Initial 486 offerings were designed to be able to be upgraded using "OverDrive" technology. This means you can insert a chip with a faster internal clock into the existing system. Not all 486 systems could use OverDrive, since it takes a certain type of motherboard to support it.

The 486 processor generation really meant you go from a command-level computer into point-and-click computing. "I could have a color computer for the first time and do desktop publishing at a significant speed," recalls technology historian David K. Allison of the Smithsonian's National Museum of American History. The Intel 486TM processor was the first to offer a built-in math coprocessor, which speeds up computing because it offloads complex math functions from the central processor.

The first member of the 486 family was the 486DX, The 486DX featured a built-in memory cache and 32-bit architecture. It had more than three times the computing power of the 386DX and was available in clock speeds of 25MHz, 33MHz, and 50MHz.

1991: 80386DX AMD

March, let the price wars begin. When Intel's original 16-MHz 386 was introduced in 1985, it cost $299; more than five years later, it was still commanding the relatively high price of $171, and the 33-MHz version fetched $214. AMD's 386DX/40 appeared in March 1991 at $281, but within a year its price plunged 50 percent to $140. Street prices of PCs, which follow chip prices, fell by as much as $1000. The market for Windows-capable PCs expand ed by 33 percent.

1991: 80486SX Intel

April, code named p45 or P23, twice as fast as a 386DX. This chip has been pushed to 120 MHz and is still in use today in older systems.
The first member of the 486 family was the 486SX. It was very power efficient and performed well for the time. The efficient design led to new packaging innovations. The 486SX came in a 176 lead Thin Quad Flat Pack (TQFP) package and was about the thickness of a quarter. It lacked the functionality of the math coprocessor of the 80486DX, it had the math coprocessor in the chip, but it was disabled, probably because it failed testing procedures. It ran at lower clock speeds than the DX - namely 16MHz, 20MHz, 25MHz, or 33 MHz. The resulting reduced cost and power lent itself to faster sales and movement into the laptop market.

1991: 486DX/50 Intel

The 486DX/50 was simply a 50MHz version of the original 486. However the DX could not support future OverDrives while the SX processor could.

1992: 80486DX2 Intel

March 2nd, code named P24 orP24S. Based upon the popular 486DX however featured internal clock speeds that doubled that of the system that operated it. Thus, a DX2 on a system with a 33MHz bus would run at 66MHz. Also known as the i486DX2. speeds were obtained due to the speed-multiplying technology which enabled the chip to operate at clock cycles greater than that of the bus. They also introduced the concept of RISC. Reduced instruction set chips (RISC) do just a few things, but really fast. This made this chip more efficient and set it apart from the older x86 chips. The DX2 offered 8 KB of write-through cache.

1992: 80486DX2/50 and 80486DX266 Intel

Making use of OverDrive technology. The extra "2" in the names indicate that the normal clock speed of the processor is being effectively doubled using OverDrive, so the 486DX2/50 is a 25MHz chip being doubled to 50MHz. The slower base speed allowed the chip to work with existing motherboard designs, but allowed the chip internally to operate at the increased speed, thereby increasing performance.

1992: 80486SL Intel

This is virtually identical to vintage 486 processors, but it contained 1.4 million transistors. The extra innards were used by its internal power management circuitry, optimizing it for mobile use. From there, Intel released various 486 flavors, mixing SL's with SX's and DX's at a variety of clock speeds. By 1994, they were rounding out their continued development of the 486 family with the DX4 Overdrive processors. While you might think these were 4X clock quadruplers, they were actually 3X triplers, allowing a 33 MHz processor to operate internally at 100 MHz.

1994: 80486DX4 Intel

Code named P24C or P24CT, the 486DX4 would triple that of the system that operated it. Speeds were obtained due to the speed-multiplying technology which enabled the chip to operate at clock cycles greater than that of the bus. They also introduced the concept of RISC. Reduced instruction set chips (RISC) do just a few things, but really fast. This made this chip more efficient and set it apart from the older x86 chips. The DX4 offered 16 KB cache, this helps the chip maintain its one clock cycle per instruction given through the use of RISC.

1993: Pentium Intel

March 22nd, code named P5, or P54, the chip contained 3.21 million transistors (thats an additional 1.9 million transistors when compared to the 80486DX), and worked on the 32-bit address bus (same as the 486). It has a 64-bit external data bus which could operate at roughly twice the speed of the 486. the Pentium processor allowed computers to more easily incorporate "real world" data such as speech, sound, handwriting and photographic images. The name Pentium, mentioned in the comics and on television talk shows, became a household word soon after introduction. it was the Pentium that introduced the next leap forward in the x86 microarchitecture: superscalar pipelines.

By this time, the Intel 486 was entrenched into the market. Intel was busy working on its next generation of processor. It was not to be called the 80586, though. There were some legal issues surrounding the ability for Intel to trademark the numbers 80586. So, instead, Intel changed the name of the processor to the Pentium, a name they could easily trademark. The original Pentium performed at 60 MHz and 100 MIPS.

The Pentium was released in three generations. The first-generation of Pentium processors was the Pentium 60 and 66 MHz. These chips used a 273-pin PGA form factor (Socket 4),and ran on 5v power. Intel announced the release of a second-generation introduced March 7, 1994 included new processors from 75, 90, 100, 120, 133, 150, 166, and 200 MHz. The processors used 296-pin SPGA form factor (Socket 7), that is physically incompatible with the first generation versions. Some of the chips (75MHz - 133MHz) could operate on Socket 5 boards as well. The third-generation of Pentium processors code named P55C were introduced January 1997, which incorporated the new technology MMX. The Pentium MMX processors were available 166, 200, 233 MHz, and 266 MHz mobile version.

Pentium is compatible with all of the older operating systems including DOS, Windows 3.1, Unix, and OS/2. Its superscalar design can execute two instructions per clock cycle. The two separate 8K caches (code cache and data cache) and the pipelined floating point unit increase its performance beyond the x86 chips. It had the SL power management features of the i486SL, but the capability was much improved. It has 273 pins that connect it to the motherboard. Internally, though, its really two 32-bit chips chained together that split the work. The first Pentium chips operated at 5 volts and thus operated rather hotly. Starting at the 100MHz version, the requirement was reduced to 3.3 volts. Starting at the 75MHz version, the chip also supported Symmetric Dual Processing, meaning you could use two Pentiums side by side in the same system.

The Pentium stayed around a long time. It was released in many different speeds as well as different flavors. In fact, Intel implemented an "s-spec" rating which is marked on each Pentium CPU which tells the owner some key data about the processor in order to make sure they have their motherboard set correctly. There were just so many different Pentiums out there that it became hard to tell.

1994: AM486DX Series AMD

Intel was not the only manufacturer playing in the sandbox at the time. AMD put out its AM486 series in answer to Intel's counterpart. AMD released the chip in AM486DX4/75, AM486DX4/100, and AM486DX4/120 versions. It contained on-board cache, power management features, 3-volt operation and SMM mode. This made the chip fitting for mobiles in addition to desktops. The chip found its way into many 486-compatibles.

1995: AM5x86 AMD

This is the chip that put AMD onto the map as official Intel competition. AMD's competitive response to Intel's Pentium-class processor. Users of the Intel 486 processor, in order to get Pentium-class performance, had to make use of an expensive OverDrive processor or ditch their motherboard in favor of a true Pentium board. AMD saw an opening here, and the AM5x86 was designed to offer Pentium-class performance while operating on a standard 486 motherboard.. They did this by designing the 5x86 to run at 133MHz by clock-quadrupling a 33 MHz chip. This 33 MHz bus allowed it to work on 486 boards. This speed also allowed it to support the 33 MHz PCI bus. The chip also had 16 KB on-die cache. All of this together, and the 5x86 performed better than a Pentium-75. The chip became the de facto upgrade for 486 users who did not want to ditch their 486-based PCs yet.

1995: Pentium Pro Intel

Code Named P6, Designed for the corporate users and for high-end servers and workstations, preferably those using Windows NT. The Pentium Pro CPUs are extremely fast with 32-bit applications and 3-D image processing and rendering when compared to previous Intel processors, enabling fast computer-aided design, mechanical engineering and scientific computation. The chip runs at 166MHz and higher. Each Pentium Pro processor is packaged together with a second speed-enhancing cache memory chip. The powerful Pentium Pro processor boasts 5.5 million transistors.

It is a RISC chip with a 486 hardware emulator on it, running at 200 MHz or below. Several techniques are used by this chip to produce more performance than its predecessors. Increased speed is achieved by dividing processing into more stages, and more work is done within each clock cycle. Three instructions can be decoded in each clock cycle, as opposed to only two for the Pentium. In addition, instruction decoding and execution are decoupled, meaning that instructions can still be executed if one pipeline stops (such as when one instruction is waiting for data from memory; the Pentium would stop all processing at this point). Instructions are sometimes executed out of order, that is, not necessarily as written down in the program, but rather when information is available, although they won't be much out of sequence; just enough to make things run smoother. Such improvements to the PPro resulted in a chip optimized for higher end desktop workstations and network servers.

It has two separate 8K L1 cache (one for data and one for instructions), and up to 1 MB of onboard L2 cache in the same package. the onboard L2 cache increased performance in and of itself because the chip did not have to make use of an L2 cache on the motherboard itself. PPro is optimized for 32-bit code, so it will run 16-bit code no faster than a Pentium, which is a big drawback. It’s still a great processor for servers, being it can be in multiprocessor systems with 4 processors. Another good thing about the Pentium Pro is that with the use of a Pentium 2 overdrive processor, you have all the perks of a normal Pentium II, but the L2 cache is full speed, and you get the multiprocessor support of the original Pentium Pro.

1995: 6x86 Series Cyrix

Cyrix, by this time, was a major player in the alternative processor market. They had been around since 1992, with their release of the 486SLC. By 1995, they had their own 5x86 processor and it was considered the only real competition to the AMD counterpart. But, they released their 6x86 in 1995. It was designed to go head to head with Intel's Pentium processor. Dubbed "M1", the chip contained two super-pipelined integer units, an on-die FPU, and 16 KB of write-back cache. It used many of the same techniques internally as the Intel and AMD chips to increase performance. Like AMD beginning with their K5 (see below), Cyrix used the P-rating system. It came in PR-120, 133, 150, 166 and 200 versions. Each rating had a "+" after it, indicating that it performed better than the corresponding Pentium. But, did it?

Cyrix had had a reputation for lagging in the area of performance, and the M1 was not an exception. The chip used a weaker FPU than both AMD and Intel, meaning it could not keep up with the competition in areas such as 3D gaming or other math-intensive software. On top of that, the chip had a reputation for running hot. Users had to get CPU fans that could keep these hot processors cool enough to run stably. Cyrix tried to combat this issue with the 6x86L processor. This "low power" processor made use of a split voltage (3.3 volts for I/O and 2.8 volts internally).

1996: MediaGX Cyrix

MediaGX was Cyrix's answer to low-cost entry level PC's. Making use of a standard x86 processor core, the chip lowered the cost of PCs using it by integrating many of the common PC components into the chip itself. MediaGX had integrated audio and video circuitry, as well as circuitry to handle many of the common tasks normally handled by chips on the motherboard itself. The CPU spoke directly to a PCI bus and DRAM memory, and the video was rather high-quality SVGA (for the time). It could support up to 128 MB of EDO RAM in 4 separate memory banks, and the video sub-system could support resolutions of up to 1280x1024x8 or 1024x768x16.

The integration of MediaGX was actually spanned across two chips: the processor itself and the MediaGX Cx5510. The chip requires a specially designed motherboard. It is not Socket 7 compatible. As a result, it is really an outsider in relation to the other processors we were discussing, but being that it was on the timetrack of history for CPUs, it bears mentioning.

1996: K5 AMD

While AMD was competing with Intel with their 5x86 processor, this chip was not a true Pentium alternative. In 1996, however, AMD released the K5. This chip was designed to go head to head with the Pentium processor. It was designed to fit right into Socket 7 motherboards, allowing users to drop K5's into the motherboards they might have already had. The chip was fully compatible with all x86 software. In order to rate the speed of the chips, AMD devised the P-rating system (or PR rating). This number identified the speed as compared to the true Intel Pentium equivalent. K5's ran from 75 MHz to 166 MHz (in P-ratings, that is). They contained 24KB of L1 cache and 4.3 million transistors. While the K5's were nice little chips for what they were, AMD quickly moved on with their release of K6.

1997: Pentium MMX Intel

Intel released many different flavors of the Pentium processor. One of the more improved flavors was the Pentium MMX, released in 1997. It was a move by Intel to improve the original Pentium and make it better serve the needs in the multimedia and performance department. One of the key enhancements, and where it gets its name from, is the MMX instruction set. The MMX instructions were an extension off the normal instruction set. The 57 additional streamlined instructions helped the processor perform certain key tasks in a streamlined fashion, allowing it to do some tasks with one instruction that it would have taken more regular instructions to do. It paid off, too. The Pentium MMX performed up to 10-20% faster with standard software, and higher with software optimized for the MMX instructions. Many multimedia applications and games that took advantage of MMX performed better, had higher frame rates, etc.

MMX was not the only improvement on the Pentium MMX. The dual 8K caches of the Pentium were doubled to 16 KB each. It also had improved dynamic branch prediction, a pipelined FPU, and an additional instruction pipe to allow faster instruction processing. With these and other improvements, the Pentium line of processor was extended even longer. The line lasted up until recently, and went up to 233 MHz. While new PCs with this processor are all but non-existent, there are many older PCs still using this processor and going strong.

1997: K6 AMD

The K6 gave AMD a real leg up in performance, and it virtually closed the gap between Intel and AMD in terms of Intel being perceived as the real performance processor. The K6 processor compared, performance-wise, to the new Intel Pentium II's, but the K6 was still Socket 7 meaning it was still a Pentium alternative. The K6 took on the MMX instruction set developed by Intel, allowing it to go head to head with Pentium MMX. Based on the RISC86 microarchitecture, the K6 contained seven parallel execution engines and two-level branch prediction. It contained 64KB of L1 cache (32KB for data and 32KB for instructions). It made use of SMM power management, leading to mobile version of this chip hitting the market. During its life span, it was released in 166MHz to 300 MHz versions. It gave the early Pentium II's a run for their money, but AMD had to improve on it in order to keep up with Intel for long.

1997: 6x86MX Cyrix

Well, Intel came up with MMX and AMD was already using it starting with the K6. So, Cyrix had to get in on the game as well. The 6x86MX, also dubbed "M2", was Cyrix's answer. This processor took on the MMX instruction set, as well as took an increased 64KB cache and an increase in speed. The first M2's were 150 MHz chips, or a P-rating of PR166 (Yes, M2's also used the P-rating system). The fastest ones operated at 333 MHz, or PR-466.

M2 was the last processor released by Cyrix as a stand-alone company. In 1999, Via Technologies acquired the Cyrix line from it's parent company, National Semiconductor. At the same time, Via also acquired the Centaur processor division from IDT.

1997: Pentium II Intel

The 7.5 million-transistor Pentium II processor incorporates Intel MMX technology, which is designed specifically to process video, audio and graphics data efficiently. It was introduced in innovative Single Edge Contact (S.E.C) Cartridge that also incorporated a high-speed cache memory chip. With this chip, PC users can capture, edit and share digital photos with friends and family via the Internet; edit and add text, music or between-scene transitions to home movies; and, with a video phone, send video over standard phone lines and the Internet.

Intel made some major changes to the processor scene with the release of the Pentium II. They had the PentiumMMX and Pentium Pro's out into the market in a strong way, and they wanted to bring the best of both into one chip. As a result, the Pentium II is kind of like the child of a Pentium MMX mother and the Pentium Pro Father. But like real life, it doesn’t necessarily combine the best of it’s parents. Pentium II is optimized for 32-bit applications. It also contains the MMX instruction set, which is almost a standard by this time. The chip uses the dynamic execution technology of the Pentium Pro, allowing the processor to predict coming instructions, accelerating work flow. It actually analyzes program instruction and re-orders the schedule of instructions into an order that can be run the quickest. Pentium II has 32KB of L1 cache (16KB each for data and instructions) and has a 512KB of L2 cache on package. The L2 cache runs at ½ the speed of the processor, not at full speed. Nonetheless, the fact that the L2 cache is not on the motherboard, but instead in the chip itself, boosts performance.

One of the most noticeable changes in this processor is the change in the package style. Almost all of the Pentium class processors use the Socket 7 interface to the motherboard. Pentium Pro's use Socket 8. Pentium II, however, makes use of "Slot 1". The package-type of the P2 is called Single-Edge contact (SEC). The chip and L2 cache actually reside on a card which attaches to the motherboard via a slot, much like an expansion card. The entire P2 package is surrounded by a plastic cartridge. In addition to Intel's departure into Slot 1, they also patented the new Slot 1 interface, effectively barring the competition from making competitor chips to use the new Slot 1 motherboards. This move, no doubt, demonstrates why Intel moved away from Socket 7 to begin with - they couldn't patent it.

The original Pentium II was code-named "Klamath". It ran at a paltry 66 MHz bus speed and ranged from 233MHz to 300MHz. In 1998, Intel did some slight re-working of the processor and released "Deschutes". They used a 0.25 micron design technology for this one, and allowed a 100MHz system bus. The L2 cache was still separate from the actual processor core and still ran at only half speed. They would not rectify this issue until the release of the Celeron A and Pentium III. Deschutes ran from 333MHz to up to 450 MHz.

1998: Pentium II Xeon Intel

The Pentium II Xeon processors are designed to meet the performance requirements of mid-range and higher servers and workstations. Consistent with Intel's strategy to deliver unique processor products targeted for specific markets segments, the Pentium II Xeon processors feature technical innovations specifically designed for workstations and servers that utilize demanding business applications such as Internet services, corporate data warehousing, digital content creation, and electronic and mechanical design automation. Systems based on the processor can be configured to scale to four or eight processors and beyond.

1998: Celeron Intel

About the time Intel was releasing the improved P2's (Deschutes), they decided to tackle the entry level market with a stripped down version of the Pentium II, the Celeron. In order to decrease costs, Intel removed the L2 cache from the Pentium II. They also removed the support for dual processors, an ability that the Pentium II had. Additionally, they ditched the plastic cover which the P2 had, leaving simply the processor on the Slot 1 style card. This, no doubt, reduced the cost of the processor quite a bit, but performance suffered noticeably. Removing the L2 cache from a chip seriously hampers its performance. On top of that, the chip was still limited to the 66MHz system bus. As a result, competitor chips at the same clock speeds could still outperform the Celeron. What was the point?

Intel had realized their mistake with the next edition of the Celeron, the Celeron 300A. The 300A came with 128KB of L2 cache on board. The L2 cache was on-die with the 300A, meaning it ran at full processor speed, not half speed like the Pentium II. This fact was great for Intel users, because the Celerons with full speed cache operated much better than the Pentium II's with 512 KB of cache running at half speed. With this fact, and the fact that Intel unleashed the bus speed of the Celeron, the 300A became well-known in overclocking enthusiast circles. It quickly became known for the cheap chip you could buy and crank up to compete with the more expensive stuff.

The Celeron is available in two formats. The original Celerons used the patented Slot 1 interface. But, Intel later switched over to a PPGA format, or Plastic Pin Grid Array, also known as Socket 370. This new interface allowed reduced costs in manufacturing. It also allowed cheaper conversion from Socket 7 boards to Socket 370. Motherboard manufacturers found it easier to swap out a Socket 7 socket for a Socket 370 socket, more or less leaving the rest of the board the same. It was more involved to change designs over to a slotted board. Slot 1 Celerons ranged from the original 233MHz up to 433 MHz, while Celerons 300MHz and up were available in Socket 370.1998 AMD K6-2 & K6-3 AMD

AMD was a busy little company at the time Intel was playing around with their Pentium II's and Celerons. In 1998, AMD released the K6-2. The "2" shows that there are some enhancements made onto the proven K6 core, with higher speeds and higher bus speeds. They probably were also taking a page out of the Pentium "2" book. The most notable new feature of the K6-2 was the addition of 3DNow technology. Just as Intel created the MMX instruction set to speed multimedia applications, AMD created 3DNow to act as an additional 21 instructions on top of the MMX instruction set. With software designed to use the 3DNow instructions, multimedia applications get even more boost. Using 3DNow, larger L1 cache, on-die L2 cache and Socket 7 usability, the K6-2 gained ranks in the market without too much trouble. When used with Socket 7 boards that contained L2 cache on board, the integrated L2 cache on the processor made the motherboard cache considered L3 cache.

The K6-3 processor was basically a K6-2 with 256 KB of on-die L2 cache. The chip could compete well with the Pentium II and even Pentium III's of the early variety. In order to eek out the full potential of the processor core, though, AMD fine tuned the limits of the processor, leading the K6-2 and K6-3 to be a bit picky. The split voltage requirements were pretty rigid, and as a result AMD held a list of "approved" boards that could tolerate such fine control over the voltages. Processor cooling was also an important issue with these chips due to the increased heat. In that regard, they were a bit like the Cyrix 6x86MX processors.

1999: Pentium III Intel

Intel released the Pentium III, Code named "Katmai", processor in February of 1999, running at 450 MHz on a 100MHz bus. Shortly after its release Intel introduced the Pentium III 550 MHz processor. The Pentium III chip continued to use the SLOT 1 and could be used on previous Pentium II motherboards with BIOS support. This original Pentium III worked off what was a slightly improved P6 core, so the chip was well suited to multimedia applications.
This processor features 70 new instructions, the SSE instruction set, also dubbed MMX2, with four simultaneous instructions able to be performed simultaneously. Internet Streaming SIMD extensions, that dramatically enhance the performance of advanced imaging, 3-D, streaming audio, video and speech recognition applications. It was designed to significantly enhance Internet experiences, allowing users to do such things as browse through realistic online museums and stores and download high-quality video. The processor incorporates 9.5 million transistors, and was introduced using 0.25-micron technology.

The chip saw controversy, though, when Intel decided to include integrated "processor serial number" (PSN) on Katmai. the PSN was designed to be able to be read over a network, even the internet. The idea, as Intel saw it, was to increase the level of security in online transactions. End users saw it differently. They saw it as an invasion of privacy. After taking a hit in the eye from the PR perspective and getting some pressure from their customers, Intel eventually allowed the tag to be turned off in the BIOS. The PIII Katmai eventually saw 600 MHz, but Intel quickly moved on to the Coppermine.

2000: Pentium III Coppermine Intel

April, while Katmai had 512 KB of L2 cache, Coppermine had half that at only 256 KB. But, the cache was located directly on the CPU core rather than on the daughtercard as typified in previous Slot 1 processors. This made the smaller cache an actual non-issue, because performance benefited. Coppermine also took on a 0.18 micron design and the newer Single Edge Contact Cartridge 2 (SECC 2) package. With SECC 2, the surrounding cartridge only covered one side of the package, as opposed to previous slotted processors. What's more, Intel again saw the logic they had when they took Celeron over to Socket 370, so they eventually released versions of Coppermine in socket format. Coppermine also supported the 133 MHz front side bus. Coppermine proved to be a performance chip and it was and still is used by many PCs. Coppermine eventually saw 1+ GHz.

1999: AMD Athlon

With the release of the Athlon processor in 1999, AMD's status in the high performance realm was placed in concrete. The Athlon line continues to this day, with the highest clock speeds all operating off of various designs and improvements off of the Athlon series. But, the whole line started with the original Athlon classic. The original Athlon came at 500MHz. Designed at a 0.25 micron level, the chip boasted a super-pipelined, superscalar microarchitecture. It contained nine execution pipelines, a super-pipelined FPU and an again-enhanced 3dNow technology. These issues all rolled into one gave Athlon a real performance reputation. One notable feature of the Athlon is the new Slot interface. While Intel couldlay games by patenting Slot 1, AMD decided to call the bet by developing a Slot of their own - Slot A. Slot A looks just like Slot 1, although they are not electrically compatible. But, the closeness of the two interfaces allowed motherboard manufacturers to more easily manufacturer mainboard PCBs that could be interchangeable. They would not have to re-design an entire board to accommodate either Intel or AMD - they could do both without too much hassle.

Also notable with the release of Athlon was the entirely new system bus. AMD licensed the Alpha EV6 technology from Digital Equipment Corporation. This bus operated at 200MHz, faster than anything Intel was using. The bus had a bandwidth capability of 1.6 GB/s.

Athlon has gone through revisions and improvements and is still being used and marketed. In June of 2000, AMD released the Athlon Thunderbird. This chip came with an improved 0.18 micron design, on-die full speed L2 cache (new for Athlon), DDR RAM support, etc. It is a real workhorse of a chip and has a reputation for being able to be pushed well eyond the speed rating as assigned by AMD. Overclocker's paradise. Thunderbird was also released in Socket A (or Socket 462) format, so AMD was now returning to its socketed roots just as Intel had already done by this time.

2001: Athlon Palomino (Athlon 4) AMDMay, while the Athlon had now been out for about 2 years, it was now being beaten by Intel's Pentium IV. The direct competition of the Pentium III was on its way to the museum already, and Athlon needed a boost to keep up with the new contender. The answer was the new Palomino core. The original intention of Palomino was to expand off of the Thunderbird chip, by reducing heat and power consumption. Due to delays, it was delayed and it ended up being beneficial. The chip was released first in notebook computers. AMD-based notebooks, until this time, were still using K6-2's and K6-3's and thus AMD's reputation for performance in the mobile market was lacking. So, Athlon 4 brought AMD to the line again in the mobile market. Athlon 4 was later released to the desktop market, workstations, and multiprocessor servers (with its true dual processor support). Palomino made use of a data pre-fetch cache predictor and a translation look-aside buffer. It also made full use of Intel's SSE instruction set. The chip made use of AMD's PowerNow! technology, which had actually been around since the K6-2 and 3 days. It allows the chip to change its voltage equirements and clock speed depending on the usage requirement of the time. This was excellent for making the chip appropriate for power-sensitive apps such as mobile systems.

When AMD released the Palomino to the desktop market in October of 2001, they renamed the chip to Athlon XP, and also took on a slightly different naming jargon. Due to the way Palomino executes instructions, the chip can actually perform more work per clock cycle than the competition, namely Pentium IV. Therefore, the chips actually operate at a slower clock speed than AMD makes apparent in the model numbers. They chose to name the Athlon XP versions based on the speed rating of the processor as determined by AMD and their own benchmarking. So, for example, the Athlon XP 1600+ performs at 1.4 GHz, but the average computer user will think 1.6 GHz, which is what AMD wants. But, this is not to say that AMD is tricking anybody. In fact, these chips to perform like the Thunderbird at the rated speed, and perform quite well when stacked against the Pentium IV. In fact, the Athlon XP 1800+ can out-perform the Pentium IV at 2 GHz. Besides the naming, the XP was basically the same as the mobile Palomino released a few months earlier. It did boast a new packaging style that would help AMD's release of 0.13 micron design chips later on. It also operated on the 133MHz front-side bus (266MHz when DDR taken into account). AMD continued to use the Palomino core until the release of the Athlon XP 2100+, which was the last Palomino. 2002: Thoroughbred 2200 AMD

June, AMD introduced the 0.13 micron Thoroughbred-based 2200+ processor. The move was more of a financial one, since there are no real performance gains between Palomino and Thoroughbred. Nonetheless, the smaller core means AMD can product more of them per silicon wafer, and that just makes sense. AMD is really taunting everyone with news of the coming ClawHammer core, which will be AMD's next big move. But, with that chip still in the development and testing phase at this point, ClawHammer is not yet ready. Until it is, AMD will keep us mildly entertained with Thoroughbred and keep Intel sweating.

1999: Pentium III Xeon Intel

The Pentium III XeonTM processor extends Intel's offerings to the workstation and server market segments, providing additional performance for e-Commerce applications and advanced business computing. The processors incorporate the Pentium III processor's 70 SIMD instructions, which enhance multimedia and streaming video applications. The Pentium III XeonTM processor's advance cache technology speeds information from the system bus to the processor, significantly boosting performance. It is designed for systems with multiprocessor configurations.

2000: Duron AMD

June, AMD released the Duron "Spitfire". Spitfire came primarily out of the Athlon Thunderbird lineage, but it had a lighter load of cache onboard, ensuring that it was not a contender in the performance realm with its big cousin. The chip had a 128 KB L1 cache, but only 64 KB of on-die L2. Despite the lower L2 cache, internal methods of dealing with the L2 cache coupled with other improvements make the Duron a clear winner when compared against the Celeron. Duron also works with the EV6 bus while Celeron was still working with 66 MHz bus, and this did not help Celeron at all.

2000: Celeron II Intel

Just as the Pentium III was a Pentium II with SSE and a few added features, the Celeron II is simply a Celeron with a SSE, SSE2, and a few added features. The chip is available from 533 MHz to 1.1 GHz. This chip was basically an enhancement of the original Celeron, and it was released in response to AMD's coming competition in the low-cost market with the Duron. The PSN of the Pentium III had been disabled in the Celeron II, with Intel stating that the feature was not necessary in the entry-level consumer market. Due to some inefficiencies in the L2 cache and still using the 66MHz bus (unless you overclock), this chip would not hold up too well against the Duron despite being based on the trusted Coppermine core. Celeron II would not be released with true 100 MHz bus support until the 800MHz edition, which was put out at the beginning of 2001.

2000: Pentium IV Intel

While we have been talking about AMD's high-speed Athlon Thunderbirds and Palominos, Intel actually beat AMD to the gun by releasing Pentium IV Willamette in November of 2000. Pentium IV was exactly what Intel needed to again take the torch from AMD. Pentium IV is a truly new CPU architecture and serves as the beginning to new technologies we will see for the next several years. The new NetBurst architecture is designed with future speed increase in mind, meaning P4 is not going to fade away quickly like Pentium III near the 1 GHz mark.

According to Intel, NetBurst is made up of four new technologies: Hyper Pipelined Technology, Rapid Execution Engine, Execution Trace Cache and a 400MHz system bus. Let's look at the first three, since they require some explanation:

Hyper Pipelined Technology
There are a couple of ways to increase the speed of a processor. One is to decrease the die size. Technology in this regard is developed quickly, but not quickly enough. The P5 core saw its limit quickly and so did the P6 core (which is why Pentium III was limited at around 1 GHz). The technology to move into a smaller die size was not yet ready at the time of the Willamette release, so Intel moved to plan B. Plan B is to change the design of the CPU pipeline so that it is wider, can accommodate more instructions. This is what Intel did. Hyper Pipelined Technology refers to Intel's expanding of the CPU pipeline from 10 stages (of the P6) to 20 stages. This effectively makes the data pipe (bad term, but descriptive) wider, and allows each stage to do actually less per clock cycle than the P6 core. The fact that each stage actually does less per clock cycle is what gives this design room for expandability. It is analogous to expanding a street highway - you add more lanes and for awhile each lane has less traffic, but eventually traffic increases and the road can handle much more traffic. The tradeoff in simply expanding this pipeline to a bunch of stages is that it takes the processor longer to recover from mistakes in the branch level prediction, being that it has to basically start over with 20 stages rather than a shorter 10-stage pipeline. The P4, though, has a newly advanced branch predictor to help with this problem.
Rapid Execution Engine
The Pentium IV contains 2 arithmetic logic units and they operate at twice the speed of the processor. While this might sound like absolute heaven, it is good to keep in mind that they had to do it this way due to the pipeline design in order to even keep integer performance up to that of the Pentium III. So, this is really a necessary design change due to the increase pipeline size.
Execution Trace Cache
Intel also did some re-working of the P4's internal cache in order to nullify the effects of a mistake in branch prediction that can be a real lag with a 20-stage pipeline. First, they increase the branch target buffer size to eight times that of the Pentium III. This cache is the area from which the branch predictor gets its data. Secondly, Intel reduced the size of the L1 data cache to only 8K in order to reduce the latency of the cache. This, no doubt, increases the need for the 256 KB on-die L2 cache, and the latency of that has been improved on the P4 as well. Lastly, Intel added a execution trace cache. This is a new cache that can hold instructions that are already decoded and ready for execution. This means that the processor does not have to again waste time decoding every instruction when a branch prediction error occurs. Instead, it can just go to this 12K cache and retrieve the operation and go.
The early Pentium 4's made use of the Socket 423 interface. One of the reasons for the new interface is the addition of heatsink retention mechanisms to either side of the socket. This is a move to help owners avoid the dreaded mistake of crushing the CPU core by tightening the heatsink down on it too tightly. The retention bases hold the heat sink onto the CPU. Socket 423 was short-lived, and Pentium IV quickly moved to Socket 478 with the release of the 1.9 GHz. Also, P4 was, at its launch, associated exclusively with Rambus RDRAM. Intel was stuck in this agreement with Rambus, and this was an obvious hurdle for promotion, being that most computer users to not have Rambus and don't wish to buy any. So, early retail P4's actually came packaged with two 64MB sticks of RDRAM. With chipset support later coming, DDR mating with the Pentium IV eventually came.

Pentium IV's, as you might expect, were and still are on the expensive end of things. The new core was quite big when compared to other processors and the cost to produce it was innately higher. In early 2002, Intel announced a new edition of the Pentium IV based on the Northwood core. The big news with this is that Intel leaves the larger 0.18 Willamette core in favor of this new 0.13 micron Northwood. This shrunk the core and therefore allowed Intel to not only make Pentium IV's cheaper but also make more of them. The core is still bigger than that of the Athlon XP, but this is explained by the fact that Intel increased the L2 cache from 256 KB to 512 KB for Northwood. This raises the transistor count from 42 million for Willamette to 55 million for Northwood. Northwood was first released in 2 GHz and 2.2 GHz versions, but the new design gives P4 room to move up to 3 GHz quite easily. It was recently released at 2.53 GHz using a 533 MHz front side bus. Other than that, Northwood is architecturally the same as Willamette.

2001: Duron Morgan AMD

August, AMD released the Duron "Morgan". This chip broke out at 950 MHz but quickly moved past 1 GHz. The Morgan processor core was the key to the improvement of Duron here, and it is comparable to the effect of the Palomino core on the Athlon. In fact, feature-wise, the Morgan core is basically the same as the Palomino core, but with 64 KB of L2 rather than 256 KB.

2000 Itanium Intel

Intel unveiled new details about its upcoming line of IA-64 processors and announced the name of the first IA-64 processor, to be called the Intel Itanium processor. Previously known by the code name Merced, the Itanium processor employs a 64-bit architecture and enhanced instruction handling to greatly increase the performance of demanding e-Business, visualization, computation and multimedia operations. Today, five different 64-bit operating systems have booted on Intel Itanium processors, underscoring the broad vendor support behind the IA-64 processor family. Servers and workstations based on the Itanium processor are scheduled for production in 2000

Unusual processors

All the chips on this list, obscure as some are, had a significant influence on the evolution of personal computing.

Intel 1103

In 1970, Intel created the 1103, the first generally available DRAM chip. By 1972, it was the best-selling semiconductor memory chip in the world. Today, you would need more than 65,000 of them to put 8 MB of memory into a PC.

Intel 1702

In another brilliant stroke of naming, Intel created this, the first EPROM, in 1971. When you say "firmware," smile and think of the 1702.

MOS Technology 6502

What do a Nintendo set and a BMW have in common? The 6502. At $25 (compared with $375 for a comparable Motorola part), the 6502 was such a steal that a talented but cash-poor whiz kid from Silicon Valley, Steve Wozniak, chose it for his new personal computer, the Apple I.

Zilog Z80

Remember Tandy's TRS-80 Model I? Remember CP/M? They were both built on the Z80.

Mips R2000

The R2000, introduced in 1986, was a 32-bit CPU with 110,000 transistors. It powered the first generation of RISC workstations and servers. The original version, clocked at 8 MHz, executed about 5 MIPS and had a separate FPU.

Chips & Technologies AT Chip Set

IBM is not known for its approach to open systems. So, while it was actively resisting the cloning of its PC architecture, C&T was introducing its AT Chip Set. With only five chips, C&T duplicated the core logic of about 100 chips in IBM's system. All a clone maker had to do was add a 286, a Phoenix BIOS ROM, and some memory to create a PC. Take that, Big Blue.

Amiga Agnes/Denise/Paula

It's not a rock group: This was the advanced chip set that powered the world's first multimedia computer: the Commodore Amiga 1000. In 1985, these three chips could do tricks that today's PCs and Macs still can't do--such as display multiple screens with independent pixel resolutions and bit depths on a single monitor.

Commodore SID

You can get remarkable results when you tell an engineer to do what he thinks is right. Take SID (Sound Interface Device), for example. In 1981, Bob Yannes was told to design a low-cost sound chip for the upcoming Commodore 64. He would end up creating an analog synthesizer chip that redefined the concept of sound in personal computers.

Yamaha OPL-2

Tweet. Beep, beep. Name that tune! The original IBM PC's sound capabilities were practically nonexistent--a simple beeper that could produce a limited range of square-wave tones. Yamaha's OPL-2 enabled vendors such as Ad Lib and Creative Labs to introduce plug-in sound boards with reasonable (but not great) sound. Today, nearly all PCs come with a sound board.

S3 911

Because PCs originally had character-oriented displays, screen performance drastically bogged down when running Microsoft Windows and graphical applications.

IBM's 8514 chip and its spin-off s provided some improvement, but the market broke wide open in 1991 when S3 introduced the 911, which integrated GUI acceleration and VGA compatibility on a single chip.

Intel Mercury

The PCI (Peripheral Component Interconnect) bus is the most important enhancement to the PC architecture since the ISA bus, and Mercury was the first implementation. Today even Apple has adopted PCI to replace the NuBus.

ID for chips and associated chipsets

16 bit chips

4004 INS4004 4040 :4004 4004/4040
4002 :RAM 4201 : 4269 : 4289 8008 MF8008 :8008 8080 : uPD8080A :8080 NEC 8080
8224 8228/8238 8212 :8bit I/O 8214 : 8226 : TMS5501 8085 :8080 8085
8155 :RAM+I/O 8755 :EP-ROM+I/O 8185 :1Kbyte RAM 8048 :INTEL 8048
8243 :I/O 8051:8048 8052H BASIC :8052 BASIC ROM 8744 :8051 8041
ZILOG
Z80 :8080 uPD70008C :C-MOS Z80 (V10) Z80
PIO :I/O CTC DMA :DMA SIO :I/O DART :SIO Z180 :HD64180 HD64180 :Z80+MMU+I/O HD647180 :HD64180 ROM Z280 :Z800 NSC800 : Z80+i8085 CPU C-MOS NSC800
NSC810 :128byte RAM + I/O + 2ch 16bit timer
MOTOROLA
6800 :MOTOROLA MB8861 MC6800 6800
MCM6810 :128byte RAM MCM6830 :1Kbyte MASK ROM MCM6830L7 :MIKBUG ROM MCM6830 :JBUG ROM (SCM44520P) MC6871B : 6801 :6800 6802 :6800 6802
MC6846 :I/O+ROM 6809 : 6809 6839 :ROM 6883 :SAM 6502
6502 :AppleII 6503 :6502
6520 :I/O 6522 : 6532 :RAM R65001EB1 :6502 R65F11 :6502 FORTH SC/MP
ISP-8A/500 :SC/MP SC/MP II INS8060 :SC/MP II INS8073 :SC/MP III SC/MP II
INS8154 :ROM+I/O
COSMAC (RCA)
CDP1802 :C-MOS COSMAC
CDP1852 :I/O CDP1854 :COSMAC UART CDP1855 :8bit CDP1871 :KeyBoard CDP18U42 :256x8bit CMOS EP-ROM
F-8 (FAIRCHILD)
F3850 :F-8 CPU F3851 :F-8 PSU(Program Strage Unit) F3853 :F-8 SMI F3854 :F-8 DMA F3861 :F-8 PIO MK38P70(MOSTEK) :F-8
8X300(SIGNETICS)
8X300 : 8X305 :8X300
TI9900Œn(TI)
TMS9900 16bitCPU TMS9980 :TMS9900 TMS9981 :TMS9980 TI9900
TMS9901 :I/F TMS9903 :
PANAFACOM L-16A
MN1610/1610A :LKit16 PANAFCOM L-16A
MN1630/1630A :SCA MN1640 :RSC AMD 2900
2901 : 2903 :2901 2904 : 2909 : 2910 : 2914 : 2906 : 2907 : 2918 :4bit 29116
INTEL 3000
3001 : 3002 :2bit NS GPC/P
IMP-00A/520 :4bit P-MOS IMP-16A/521D :IMP-16 16bit ROM
MOTOLORA MC10180
MC10180 :ECL 2650 IM6100 (Intersil) :DEC PDP-8E
SIGNETICS 8X300 (8bit CPU)

Bipolar Year: 1977
SIGNETICS 8X305 (8bit CPU)
Address bus Data bus
SIGNETICS 8X305 (8bit CPU)
Address bus Data bus
RCA CDP1802 (8bit CPU)
Address bus 16bit, Data bus 8bit.

1976

Hughes AirCraft 1802

RCA 1802

Signetics 2650 (8bit CPU)
Address bus 15bit, Data bus 8bit.

1978
Signetics 2650

Signetics 2650

MOS Technology MCS6502 (8bit CPU)
Address bus 16bit, Data bus 8 bit.

DIP40P Clock 1MHz, 2MHz.

6503 - 11 CPU Rockwell

SYNERTEK6502B ROCKWELL
INTEL i4002
MCS RAM

i4004i4040
INTEL 4004 (4bit CPU)
DIP16P Address bus 12bit, Data bus 4 bit

1971/11/15
NS(National Semiconductor) INS4004
INTEL 4040 (4bit CPU)
DIP24P Address bus 12bit, Data bus 4 bit

1972/4/1
INTEL i4201
MCS
i4004
INTEL i4289
MCS
i4004
INTEL 8008 (8bit CPU)
Address bus 14bit, Data bus 8 bit.

DIP18P Clock 0.5MHz 0.8MHz.

P-MOS 6um 3,100.

1972/04/01
MF 8008 (8bit CPU)
Address bus 14bit, Data bus 8 bit.

DIP18P Clock 0.5MHz 0.8MHz.

P-MOS 6um 3,100

1972/04/01
INTEL 8080 (8bit CPU)
Address bus 16bit, Data bus 8 bit.

DIP40PClock 2.0MHz 2.5MHz 3.0MHz.

N-MOS 6um 4,500.xsistor

1974/04/01
NEC D8080A
Intel i8080A
Toshiba 8080A

National Semiconductor 8080A 1970
Mitsubishi 8080A

INTEL 8080A
AMD8080A
Texas Instruments 8080A
AMD 8080

AMD8080A
8080A
INTEL 8085 (8bit CPU)
Address bus 16bit, Data bus 8 bit.

DIP40PClock 3.0Mz 5.0MHz

N-MOS 3um 6,200.

1976/01/01
C8085 1978
NEC D8085A
NEC D8085A

i8085A i8085 N-MOS
8085B

AMD8085A
Intel 8155 2048bit RAM with I/O ports and timer
MCS-85

NEC8155B
INTEL 8185
1024RAM
MCS-85
INTEL 8755
16384bit EPROM with I/O

MCS-85
INTEL Ì8755A 1977

8755A

NEC8755A

Toshiba 8755A
I/O UniSite Programmable

EPROM
Intersil 6100 (12bit CPU)
Address bus 12bit, Data bus 12bit (Multiplexed).

DIP40P Clock 4,8MHz

C-MOS

1976
HARRIS M6100A
National Semiconductor INS8154
128 x 8bit RAM & I/O

C/MP
INS8154B
MOTOROLA 6800 (8bit CPU)
Address bus 16bit, Data bus 8 bit

DIP40P Clock 1MHz 1.5MHz 2MHz

N-MOS 5,400.

1974/08
MC6800
6800B
2MHz 6800B
1978

SGS-Thomson 6800B
AMI 6800B 2Mz
AMI6800
XC6800
M6800
MOTOROLA 6801 (8bit CPU)
Address bus 16bit, Data bus 8 bit.

DIP40P Clock 4MHz
N-MOS
MOTOROLA 6802 (8bit CPU)
Address bus 16bit, Data bus 8 bit.

DIP40P Clock 1MHz 1.5MHz 2MHz

N-MOS
6802

AMI6802
Motorola 6802A
MOTOROLA 6809 (8bit CPU)
Address bus 16bit, Data bus 8 bit.

DIP40P Clock 1MHz 1.5MHz 2MHz

N-MOS

1979
Hitachi M6809

C-MOS

Motolora 6809B
MOTOROLA MC6883
SYNCHRONOUS ADDRESS MULTIPLEXER (SAM)
MC6809
National Semiconductor NSC800

(8bit CPU)
Address bus 16bit, Data bus 8bit.

DIP40P Clock 2.5MHz 4MHz

C-MOS

1979
NSC800

National Semiconductor NSC810
1024bit RAM with I/O ports and timer

NSC800

NSC810A NSC810 TIMER
ROCKWELL R65001EB1 (8bit CPU)
Address bus 16bit, Data bus 8 bit.

DIP40P Clock 1MHz 2MHz

N-MOS

1979

R65001EB1

National Semiconductor SC/MP
(8bit CPU)
Address bus 12bit, Data bus 8bit.

DIP40P Clock 1MHz

P-MOS

1976

National Semiconductor SC/MP II
(8bit CPU)
Address bus 12bit, Data bus 8bit.

DIP40P Clock 4MHz

N-MOS

1977
SC/MP INS 8060
National Semiconductor SC/MP III

(8bit CPU)

Address bus 16bit, Data bus 8bit.

DIP40P Clock 4MHz

N-MOS

1978
TMS9900 (16bit CPU)
Address bus 16bit, Data bus 16 bit.

DIP64P Clock 3.3MHz

N-MOS

1976/07
TMS9900
TMS9980 (16bit CPU)
Address bus 14bit, Data bus 8 bit.

DIP40P Clock 2MHz

N-MOS

1977
TMS9980
TMS9981 (16bit CPU)
Address bus 14bit, Data bus 8 bit.

DIP40P Clock 2MHz

N-MOS

1977

Zilog Z80 (8bit CPU)
Address bus 16bit, Data bus 8 bit.

DIP40P Clock 2.0Mz 4.0MHz 6.0MHz.

N-MOS 8,200.

1976/07

Zilog 6MHz Z80B 8MHz Z80 Sharp

SHARP
NEC Z80A (uCOM-82)
NECZilog
uPD70008
Z80
Zilog Z80A CPU

Z80
MOSTEKZ80 10MHz

Zilog

Z80A
883C
MIL-STD-883
Z80A C-MOS
Zilog Z280 (16bit CPU)
Address bus 24bit, Data bus 16bit

PLCC68P Clock 10MHz 12MHz

C-MOS

1987

other misc chips

133MHz 256K 3.1V

5.5M(core)+15.5M(cache)

Q0815
166MHz 512K 3.3V

5.5M(core)+31M(cache)

SY034
180MHz 256K 3.3V

5.5M(core)+15.5M(cache)

SY031
200MHz 256K 3.5V

5.5M(core)+15.5M(cache)

SL247
200MHz 1024K 3.3V

5.5M(core)+62M(cache)

SL25A
Motorola MC6820
PIA (Peripheral Interface Adapter)
M6800
Motorola MC6821
PIA (Peripheral Interface Adapter)

M6800

6820
6821B

XC6801976

MC6800 co
HD46505
CRTC (CRT controller)
HMCS6800

HD46505
HD46505S
MOTOROLA MC6845B
HD4650 Rockwell
AMD AM9511 APU (Arithmetic Processing Unit)
1977
HD63484
ACRTC (Advanvced CRT Controller)
1984

HD63484
INTEL i8251
USART (Universal Synchronous/Asynhronous Receiver/Transmitter)
i8080i8085
8251B
INTEL
9551
INTEL i8255
PPI (Programmable Peripheral Interface)
i8080i808
MOTOROLA MC68488
GPIA (General Purpose Interface Adapter) I/F
MC6800
N-MOS
1977
National Semiconductor MM57109
NOP (Number Oriented Processor)
1977
TMS9914
GPIB Adapter
TMS9900
N-MOS C-MOS
1980TMS9914A
8185 RAM chip
MEX68KECB 4Mhz MC68000 MEX68KECB CPU
MP-16C ROM
1101 RAM INTEL
1101 RAM 256-1 bit static RAM
80286 iAPX286 CPU
80287 Numeric Coprocessor
82284 Clock Generator
82288 Bus Controller
8207 Dual Port DRAM Controller
8208 DRAM Controller
82730 TEXT Coprocessor
82062 HARD Disk Controller
8272A Floppy Disk Controller
82586 LAN Coprocessor
82530 Serial Communication Controller
8256 Mulitifunction UART
8751 MCS-51 CPU (EP-ROM Version)
8032 MCS-51 CPU (ROM less Version)

Generations

The following table shows the different CPU generations. They are predominantly Intel chips, but in the 5th generation we see alternatives:

Please notice that the mobile CPUs as well as Pentium III CuMine include very large on-die L2-caches. These caches consist of millions of transistors.

Another generation chart

In the beginning Intel and Motorola

And with a time scale

More information to add to other chart

More information

Moore's Law

IBM succeeded as the first in making copper conductors instead of aluminum. Copper is cheaper and faster, but the problem was to isolate it from the silicon. The problem has been solved with a new type of coating, and now chips can be designed with 0.13 micron technology. The technology is expected later to work with just 0.05 micron wiring!

Texas Instruments announced on August 27th 1998 that they expect 0.07 micron CMOS processing in the year 2001.

AMD was the first company to mass-produce copper-wired CPU's. This happened in their fab 30 in Dresden, April 2000.